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HD74HC670
4-by-4 Register File (with 3-state outputs)
REJ03D0639-0200 (Previous ADE-205-521) Rev.2.00 Mar 30, 2006
Description
The HD74HC670, 16-bit register file is organized as 4 words of 4 bits each and separate on-chip decoding is provided for addressing the four word locations to either write-in or retrieve data. This permits simultaneous writing into one location and reading from another word location. Four data inputs are available which are used to supply the 4-bit word to be stored. Location of the word is determined by the write-address inputs A and B in conjunction with a write-enable signal. Data applied at the inputs should be in its true form. That is, if a high-level signal is desired from the output, a high-level is applied at the data input for that particular bit location. The latch inputs are arranged so that new data will be accepted only if both internal address gate inputs are high. When this condition exists, data at the D input is transferred to the latch output. When the write-enable input, (GW) is high, the data inputs are inhibited and their levels can cause no change in the information stored in the internal latches. When the read-enable input, (GR) is high, the data outputs are inhibited and go into the high-impedance state. The individual address lines permit direct acquisition of data stored in any four of the latches. Four individual decoding gates are used to complete the address for reading a word. When the read address is made in conjunction with the read-enable signal, the word appears at the four outputs.
Features
* High Speed Operation: tpd (Read Select to Q) = 21 ns typ (CL = 50 pF) * High Output Current: Fanout of 15 LSTTL Loads * Wide Operating Voltage: VCC = 2 to 6 V * Low Input Current: 1 A max * Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) * Ordering Information
Part Name HD74HC670P HD74HC670FPEL Package Type DILP-16 pin SOP-16 pin (JEITA) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) Package Abbreviation P FP -- EL (2,000 pcs/reel) Taping Abbreviation (Quantity)
Note: Please consult the sales office for the above package availability.
Rev.2.00 Mar 30, 2006 page 1 of 8
HD74HC670
Function Table
Write Inputs WB L L H H X WA L H L H X Read Inputs RA L H L H GW L L L L H 0 Q=D Q0 Q0 Q0 Q0 1 Q0 Q=D Q0 Q0 Q0 Outputs GR L L L L Q1 W0 B1 W1 B1 W2 B1 W3 B1 Q2 W0 B2 W1 B2 W2 B2 W3 B2 Q3 W0 B3 W1 B3 W2 B3 W3 B3 Q4 W0 B4 W1 B4 W2 B4 W3 B4 Word 2 Q0 Q0 Q=D Q0 Q0 3 Q0 Q0 Q0 Q=D Q0
RB L L H H
X X H Z Z Z Z H : high level L : low level X : irrelevant Z : high impedance (off) (Q = D): The four selected internal flip-flop outputs will assume the states applied to the four external data inputs. Q0 : The level of Q before the indicated input conditions were established. W0 B1 : The first bit of word 0, etc.
Pin Arrangement
D2 Data D3 D4 RB RA Q4 Outputs Q3 GND
1 2 3 4 5 6 7 8 D3 D4 RB RA Q4 Q3 Q2 D2 D1 WA WB CW CR Q1
16 15 14 13 12 11 10 9
VCC Data D1 WA WB Write Enable Read Q1 Outputs Q2 Write select
Read select
(Top view)
Rev.2.00 Mar 30, 2006 page 2 of 8
HD74HC670
Logic Diagram
To other three bits
D G D G D G D G Q Data Q Q Q Q VCC
WA
RA
WB
GR
GW
RB
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Storage temperature Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Tstg Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 35 75 500 -65 to +150 Unit V V mA mA mA mW C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time Note:
*1
Symbol VCC VIN, VOUT Ta tr , tf
Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500 0 to 400
Unit V V C ns
Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics.
Rev.2.00 Mar 30, 2006 page 3 of 8
HD74HC670
Electrical Characteristics
Ta = 25C Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 VIL 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 VOL 2.0 4.5 6.0 4.5 Off-state output current Input current Quiescent supply current IOZ Iin ICC 6.0 6.0 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- -- Max -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.5 0.1 4.0 Ta = -40 to+85C Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- -- Max -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 5.0 1.0 40 V IOH = -6 mA IOH = -7.8 mA Vin = VIH or VIL IOL = 20 A V Unit V Test Conditions
Output voltage
VOH
V
Vin = VIH or VIL IOH = -20 A
IOL = 6 mA IOL = 7.8 mA A Vin = VIN or VIL, Vout = VCC or GND A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A
Rev.2.00 Mar 30, 2006 page 4 of 8
HD74HC670
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25C Item Propagation delay time Symbol VCC (V) tPLH tPHL tPLH tPHL tPLH tPHL Output enable time Output disable time Pulse width tZH tZL tHZ tLZ tw 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 Hold time th 6.0 2.0 4.5 6.0 2.0 4.5 Latch time for new data Output rise/fall time Input capacitance tlatch 6.0 2.5 4.5 6.0 tTLH tTHL Cin 2.0 4.5 6.0 -- Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 80 16 14 60 12 10 60 12 10 50 10 9 50 10 9 100 20 17 -- -- -- -- Typ -- 21 -- -- 24 -- -- 18 -- -- 18 -- -- 17 -- -- -- -- -- 4 -- -- -- -- -- 6 -- -- -- -- -- -- -- -- 5 -- 5 Max 160 32 27 200 40 34 150 30 26 150 30 26 150 30 26 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 75 15 13 10 Ta = -40 to +85C Min -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 100 20 17 75 15 13 75 15 13 63 13 11 63 13 11 125 25 21 -- -- -- -- Max 200 40 34 250 50 43 190 38 33 190 38 33 190 38 33 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 95 19 16 10 ns ns Write enable to Write select ns Write select to Write enable ns ns ns Write enable to Q Unit ns Test Conditions Read select to Q
ns
Data to Q
ns
Setup time
tsu
ns
Data to Write enable
ns
Write enable to Data
ns
pF
Rev.2.00 Mar 30, 2006 page 5 of 8
HD74HC670
Test Circuit
VCC VCC Output Input
See Function Table
GR GW RA RB WA WB
1 k Q1 to Q4 CL = 50 pF
S1
OPEN GND VCC
Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
TEST t PLH / t PHL t ZH/ t HZ t ZL / t LZ
S1 OPEN GND VCC
D1 to D4
Note : 1. CL includes probe and jig capacitance.
Waveforms
* Waveform - 1
tr WA or WB
10 % 90 % 50 % 90 % 50 % 10 %
tf VCC
t su tf Data D1 to D4
90 % 50 % 10 %
th tr
90 % 50 % 10 %
0V
VCC 0V VCC 0V
t su tf GW
90 % 50 % 10 % 10 %
th tr
90 % 50 %
tw t latch RA or RB
10 %
tr
90 % 50 % 90 % 50 %
tf VCC
10 %
0V
t PHL
t PLH
90 %
VOH VOL
Q1 to Q4
50 % 50 % 10 % 10 %
t THL
t TLH
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
Rev.2.00 Mar 30, 2006 page 6 of 8
HD74HC670
* Waveform - 2
tr Data D1 to D4 tf VCC
50%
0V VCC
GW tPLH
50%
0V tPHL VOH Q1 to Q4
50% 50%
VOL
VCC Data D1 to D4
50%
0V
VCC GW tPHL
90% 50% 10% 50%
0V tPLH
90% 50%
VOH VOL
Q1 to Q4
tTHL
tTLH
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
* Waveform - 3
tf Read Enable 90 % 50 % 10 % t ZL Waveform - A 50 % t ZH Waveform - B 50 % t HZ 90 % 10 % t LZ tr 90 % 50 % VCC 0V VOH 10 % VOL VOH VOL Notes : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns 2. Waveform - A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform - B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement.
Rev.2.00 Mar 30, 2006 page 7 of 8
HD74HC670
Package Dimensions
JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g
D
16
9
1 0.89 b3
8
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 19.2 20.32 6.3 7.4 5.06
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.12 2.54
JEITA Package Code P-SOP16-5.5x10.06-1.27
RENESAS Code PRSP0016DH-B
Previous Code FP-16DAV
MASS[Typ.] 0.24g
*1
D F 9
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
8 bp x M L1
Reference Symbol
c
Dimension in Millimeters
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
Rev.2.00 Mar 30, 2006 page 8 of 8
A
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